1. Field
Embodiments described herein relate generally to a nonvolatile semiconductor memory device configured by electrically-rewritable nonvolatile memory cells, and an operation method thereof.
2. Description of the Related Art
NAND type flash memory is known as nonvolatile semiconductor memory device that is electrically rewritable and can be highly integrated. In NAND type flash memory, a NAND cell unit is configured by a plurality of memory cells which are connected in series such that adjoining memory cells share source/drain diffused layers. Both ends of the NAND cell unit are connected to a bit line and a source line respectively through select gate transistors. Such a configuration of the NAND cell unit enables a smaller unit cell area and a larger memory capacity than those of NOR type device.
A memory cell of NAND type flash memory includes a charge accumulation layer (floating gate electrode) formed on a semiconductor substrate via a tunnel insulating film and a control gate electrode stacked on the charge accumulation layer via an inter-gate insulating film, and stores data in a nonvolatile manner depending on the charge accumulation state of the floating gate electrode. For example, a memory cell stores two-value data by defining a high threshold voltage state in which electrons are injected in the floating gate electrode as data “0” and a low threshold voltage state in which electrons in the floating gate electrode are discharged as data “1”. Multi-value data such as four-value data, eight-value data, etc. can also be stored by subdividing the threshold voltage distributions to be written in the memory cell.
A data write operation of a NAND type flash memory is executed as an operation of supplying a program voltage VPGM to a selected word line and injecting electrons into the floating gate electrode from a cell channel by FN tunneling. When storing two-value data, the potential of the cell channel is controlled in accordance with whether the data to be written is “0” or “1”. When writing data “0”, a voltage VSS is supplied to the bit line and transferred to the channel of the selected memory cell through the select gate transistor that is conductive. At this time, in the selected memory cell, a high electrical field is applied between the floating gate electrode and the channel, injecting electrons into the floating gate electrode. When writing data “1” (writing no data), a voltage VDD is supplied to the bit line. After the channel of the selected memory cell is charged up to the voltage VDD, the select gate transistor becomes nonconductive and brings the channel into a floating state. At this time, the potential of the channel of the selected memory cell rises due to capacitance coupling with the word line, prohibiting electrons from being injected into the floating gate electrode.
When storing multi-value data, the number of times to apply program voltage pulses to the selected word line and the voltage value of the program voltage VPGM are controlled in accordance with the data to be written (“11”, “01”, “00”, and “10” when storing four-value data, for example). By this control, the amount of electrons to be injected into the floating gate electrode can be controlled and a threshold voltage distribution corresponding to the data to be written can be set in the memory cell.
In a write operation of a NAND type flash memory, it is necessary to charge the channel of the selected memory cell to be written with no data by supplying the voltage VDD to the bit line, as described above. In NAND type flash memory, a write operation is executed in multiple (for example, 8 k-byte number of) memory cells connected to one word line simultaneously. Therefore, there are a very large number of bit lines to be written with no data, and the power consumed to charge the bit lines is large. The bit line tends to become longer these days as the capacity of the memory chip is increasing, and the capacitance of one bit line is also becoming larger. A peak current becomes the largest when the bit line is charged during the write operation. A high peak current causes noise, which becomes a factor of supply voltage drop and hence erroneous operations and reliability reduction. An issue in a write operation of a NAND type flash memory is to charge the bit line with low power consumption.